Changeset 17 in XOpenSparcT1 for trunk/WB2ALTDDR3/dram_wb.v

Timestamp:

03/25/11 12:19:25 (14 years ago)

Author:

pntsvt00

Message:

la simulazione legge dalla flash

File:

• trunk/WB2ALTDDR3/dram_wb.v (modified) (7 diffs)

trunk/WB2ALTDDR3/dram_wb.v

@@ -47 +47 @@
    //output            ddr3_reset,
    output     [12:0] ddr3_a,
-   output     [ 2:0] ddr3_ba,
+   output     [ 1:0] ddr3_ba,
    output            ddr3_ras_n,
    output            ddr3_cas_n,
@@ -64 +64 @@
 );
 
-wire [255:0] rd_data_fifo_out;
+wire [127:0] rd_data_fifo_out;
 reg  [ 23:0] rd_addr_cache;
-wire [ 71:0] wr_dout;
+wire [127:0] wr_dout;
 wire [ 31:0] cmd_out;
 reg          wb_stb_i_d;
-reg  [ 31:0] mask_data;
+reg  [ 15:0] mask_data;
 
 wire dram_ready;
@@ -83 +83 @@
     .phy_init_done(phy_init_done),
     .app_wdf_mask_data(mask_data),
-    .app_af_addr(cmd_out[25:2]),
+    .app_af_addr(cmd_out[31:1]),
     .rd_data_valid(rd_data_valid),
     .rd_data_fifo_out(rd_data_fifo_out),    
-    .app_wdf_data(wr_dout[63:0]),
+    .app_wdf_data(wr_dout[127:0]),
          
          // in dubbio
@@ -96 +96 @@
          .clk0_tb(),
          .idly_clk_200(clk200),
-         //.rst0_tb(ddr3_reset),
+         .rst0_tb(ddr3_reset),
     
     .ddr2_dqs(ddr3_dqs),
@@ -110 +110 @@
     .ddr2_we_n(ddr3_we_n),
     .ddr2_ba(ddr3_ba),
-         .ddr2_a(ddr3_a),
+    .ddr2_a(ddr3_a),
     .ddr2_dm(ddr3_dm)
 //               |
@@ -178 +178 @@
 );
 */
+
 assign ddr_rst=!phy_init_done;
 
@@ -299 +300 @@
 reg rd_data_valid_stb_d3;
 reg rd_data_valid_stb_d4;
-reg [255:0] rd_data_fifo_out_d;
+reg [127:0] rd_data_fifo_out_d;
 reg wb_ack_d;